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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
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entity barrel_shifter is
port(	a: in bit_vector(7 downto 0);
		lar: in bit_vector (1 downto 0);
		amt: in bit_vector (2 downto 0);
		y: out bit_vector (7 downto 0)); 
end barrel_shifter;
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architecture barrel_shifter of barrel_shifter is
signal logical_shift,arithmetic_shift,rotation: bit_vector (7 downto 0);
begin
with amt select
	logical_shift <= a when "000",
						a srl 1 when "001",
						a srl 2 when "010",
						a srl 3 when "011",
						a srl 4 when "100",
						a srl 5 when "101",
						a srl 6 when "110",
						a srl 7 when "111";
with amt select
	arithmetic_shift <=	a when "000",
								a sra 1 when "001",
								a sra 2 when "010",
								a sra 3 when "011",
								a sra 4 when "100",
								a sra 5 when "101",
								a sra 6 when "110",
								a sra 7 when "111";
with amt select
	rotation <= a when "000",
					a ror 1 when "001",
					a ror 2 when "010",
					a ror 3 when "011",
					a ror 4 when "100",
					a ror 5 when "101",
					a ror 6 when "110",
					a ror 7 when "111";
with lar select
	y <=	logical_shift when "00",
			arithmetic_shift when "01",
			rotation when others;
end barrel_shifter;