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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;



entity priority_encoder1 is
port (r: in std_logic_vector (7 downto 0);
		code: out std_logic_vector (2 downto 0));
end priority_encoder1;

architecture priority_encoder1 of priority_encoder1 is

begin
code <=	"111" when r(7)='1' else
			"110" when r(6)='1' else
			"101" when r(5)='1' else
			"100" when r(4)='1' else
			"011" when r(3)='1' else
			"010" when r(2)='1' else
			"001" when r(1)='1' else
			"000" when r(0)='1' else
			"ZZZ";
end priority_encoder1;